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Электронный компонент: X88C64SI

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X88C64 SLIC
E
2
1
Xicor, Inc. 1993, 1995, 1996 Patents Pending
Characteristics subject to change without notice
6540-1.5 7/9/96 T0/C1/D0 NS
E
2
Micro-Peripheral
64K
X88C64 SLIC
E
2
8192 x 8 Bit
80C51 Microcontroller Family Compatible
SLIC
E
2
and CONCURRENT READ WRITE
TM
are trademarks of Xicor, Inc.
DESCRIPTION
The X88C64 SLIC E
2
is a highly integrated E
2
Micro-
controller peripheral which combines the functional-
ity of the X88C64 component with pre-loaded soft-
ware routines allowing any embedded system using
it to upgrade and download software via the serial
port. This self-loading integrated code eliminates the
need to initially program the firmware into a memory
device at the time of initial manufacture. The SLIC
routines also greatly facilitate the loading of subse-
quent versions of the firmware into the system.
The SLIC routines consist of approximately 500 bytes
of instructions for the 8051 which will initialize the
microcontroller and its on-board UART and download
the user's software through the UART. The baud rate
for the transfer is 9600 based on a crystal frequency
of 11MHz. Data transfer is accomplished using a
proprietary format called XCOM. Xicor also has de-
veloped a program for IBM PCs and compatibles
called XSLIC, which will translate an Intel HEX format
file into XCOM format and upload the program to an
X88C64 SLIC E
2
.
The X88C64 device itself is an 8K x 8 E
2
PROM
fabricated with advanced CMOS Textured Poly Float-
FEATURES
SLIC (SELF LOADING INTEGRATED CODE)
FIRMWARE
Automatically Downloads User's Software into
8051 Based Systems
Features Load, Verify, and Block Protection
Capabilities
Transfers Baud Rate 9600 at 11MHz
CONCURRENT READ WRITE
TM
--Dual Plane Architecture
--Isolates Read/Write Functions
Between Planes
--Allows Continuous Execution of Code
From One Plane While Writing in
the Other Plane
Multiplexed Address/Data Bus
--Direct Interface to Popular 8051 Family
Block Protect Register
--Individually Set Write Lock Out in 1K Blocks
Toggle Bit Polling
--Early End of Write Detection
Page Mode Write
--Allows up to 32 Bytes to be Written in
One Write Cycle
A
PPLICATION
N
OTES
AND
D
EVELOPMENT
S
YSTEM
A V A I L A B L E
AN6264 AN66 AN68 XK88
TYPICAL APPLICATION
7
8
9
10
11
13
14
15
21
20
17
19
2
5
6
22
18
23
16
A/D0
A/D1
A/D2
A/D3
A/D4
A/D5
A/D6
A/D7
A8
A9
A10
A11
A12
WC
PSEN
ALE
RD
WR
CE
V
CC
24
Target System
X88C64 SLIC
E
2
39
38
37
36
35
34
33
32
21
22
23
24
25
29
30
17
16
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P2.0
P2.1
P2.2
P2.3
P2.4
PSEN
ALE
RD
WR
P2.7
80C51 C Family
EA/VP
X1
X2
P3.0
P3.1
31
19
18
RS232
DRIVERS
IBM PC
OR
COMPATIBLE
6540 ILL F01.1
X88C64 SLIC
E
2
2
ing Gate Technology. The X88C64 features a Multi-
plexed Address and Data bus allowing direct inter-
face to a variety of popular single-chip microcontrollers
operating in expanded multiplexed mode without the
need for additional interface circuitry.
The X88C64 is internally configured as two indepen-
dent 4K x 8 memory arrays. This feature provides the
ability to perform nonvolatile memory updates in one
array and continue operation out of code stored in the
other array; effectively eliminating the need for an
auxiliary memory device for code storage.
To write to the X88C64 SLIC E
2
,
a three-byte com-
mand sequence must precede the byte(s) being writ-
ten. This sequence called Software Data Protection
prevents the loss of data or program information due
to inadvertant write cycles during power-up or power-
down. The X88C64 SLIC E
2
also provides a second
generation software data protection scheme called
Block Protect.
Block Protect can provide write lockout of the entire
device or selected 1K blocks. There are eight 1K x 8
blocks that can be write protected individually in any
combination required by the user. Block Protect, in
additional to Write Control input, allows the different
segments of the memory to have varying degrees of
alterability in normal system operation.
For further information on the X88C64 hardware
interface, consult the X88C64 Data Sheet.
PIN NAMES
Symbol
Description
ALE
Address Latch Enable
A/D
0
A/D
7
Address Inputs/Data I/O
A
8
A
12
Address Inputs
RD
Read Input
WR
Write Input
PSEN
Program Store Enable Input
CE
Chip Enable
WC
Write Control
V
SS
Ground
V
CC
Supply Voltage
6540 PGM T01
PIN CONFIGURATION
DIP/SOIC
6540 FHD F02
NC
A12
NC
NC
WC
PSEN
A/D0
A/D1
A/D2
A/D3
A/D4
VSS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
WR
ALE
A8
A9
A11
RD
A10
CE
A/D7
A/D6
A/D5
X88C64
X88C64 SLIC
E
2
3
ORDERING INFORMATION
Device
Temperature Range
Blank = Commercial = 0
C to +70
C
I = Industrial = 40
C to +85
C
M = Military = 55
C to +125
C
Package
P = 24-Lead Plastic DIP
S = 24-Lead SOIC
LIMITED WARRANTY
Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes
no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described
devices from patent infringement. Xicor, Inc. makes no warranty of merchantability or fitness for any purpose. Xicor, Inc. reserves the right to
discontinue production and change specifications and prices at any time and without notice.
Xicor, Inc. assumes no responsibility for the use of any circuitry other than circuitry embodied in a Xicor, Inc. product. No other circuits, patents,
licenses are implied.
US. PATENTS
Xicor products are covered by one or more of the following U.S. Patents: 4,263,664; 4,274,012; 4,300,212; 4,314,265; 4,326,134; 4,393,481;
4,404,475; 4,450,402; 4,486,769; 4,488,060; 4,520,461; 4,533,846; 4,599,706; 4,617,652; 4,668,932; 4,752,912; 4,829,482; 4,874,967; 4,883,976;
4,980,859; 5,012,132; 5,003,197; 5,023,694. Foreign patents and additional patents pending.
LIFE RELATED POLICY
In situations where semiconductor component failure may endanger life, system designers using this product should design the system with
appropriate error detection and correction, redundancy and back-up features to prevent such an occurrence.
Xicor's products are not authorized for use as critical components in life support devices or systems.
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life,
and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected
to result in a significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure
of the life support device or system, or to affect its safety or effectiveness.
SLIC
X88C64 X X